make

The basic idea behind make is the target, a goal that you want to achieve.

• A target can be a file or a label.
• Targets can have dependencies. To build a target, make follows rules.

A simple makefile

# object files
OBJS=aux.o main.o
$myVar="building..."

all: myprog

myprog:
  echo $myVar
  $(OBJS)
  $(CC) -o myprog $(OBJS)

In the example above, the # in the first line denotes a comment. The second line is a macro definition that sets the OBJS variable to two file names. all is the first target. Macros are different from variables. Macro’s do not change after make has started building a target, variables can change. Variables begin with a $. The first target is always the default. The default target is used when you run make on the command line with no targets specified. The rule for building a target comes after the “:”. make is very strict about tabs!