Troubleshooting Memory
File System Paging
File system paging is caused by the reading and writing of of pages in memory-mapped files. When needed, the kernel can free memory by paging some out. If a file system page has been modified in main memory (called dirty), the page out will require it to be written to disk. If, instead, the file system page has not been modified (called clean), the page out simply frees the memory for immediate reuse, since a copy already exists on disk.
Anonymous Paging (swapping)
Anonymous paging involves data that is private to a process; the process heap and stack. It is termed anonymous because it has no named location in the operating system. Anonymous page-outs require moving data to the physical swap locations or swap files. Linux uses the term swapping for this type of paging. Anonymous paging hurts performance and has therefore been referred to as ‘bad paging’. When applications access memory pages that have been paged out, they block on the disk I/O required to read them back to main memory. This is called ‘anonymous page-in’, which introduces latency to applications.
How the operating system deals with memory saturation:
- Paging
- Reaping
- OOM killer
Working Set Size
- Working Set Size (WSS) is the amount of main memory a process frequently uses to perform work. It is a useful concept for memory perforamnce tuning. Performance should greatly improve if the WSS can fit in the CPU caches, rather than main memory. Also, performance will degrade if the WSS exceeds the amount of main memory, as this additional overhead will involve swapping.
Memory Hardware
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RAM (Main Memory): Dynamic RAM (DRAM), provides high-density storage; each bit is implemented as a capacitor and a transistor; requires a constant refresh to maintain charge. The access time of RAM can be measured as the column address strobe (CAS) latency. CAS is the time between sending a memory module the desired address to fetch and when the data is available to read. For DDR4 it is around 10-20 nanoseconds.
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CPU caches
- Level 1: Usually split into separate instruction and data caches
- Level 2: A cache for both instructions and data
- Level 3: Another larger level of cache
MMU (Memory Management Unit)
- The MMU is response for virtual-to-physical address translations. These are performed per-page, and offsets within a page are mapped directly.
TLB (Translation Lookaside Buffer)
- The TLB is used by the MMU as the first level of address translation cache, followed by the page table in main memory.
Tools
vmstatswaponsarslabtopnumastatpstop/htoppmapperf